1. Field of the Invention
The present invention relates to a semiconductor device isolation structure and its fabricating method and, more particularly, to a semiconductor device isolation structure which is suitable for a high-density integrated circuit, and its fabricating method.
2. Discussion of Related Art
As a semiconductor device gets highly integrated, it is required to reduce the size of a device isolation region. In general, semiconductor devices are isolated with a trench isolation structure which can be prepared in a manner that a trench is formed in a designated portion and then filled with trench-filling material such as an insulating material. With the high integration of a semiconductor device, however, the above-described conventional semiconductor device isolation structure and its fabricating method involve some problems in that the trench cannot be completely filled with the trench-filling material and a void is generated in the trench according to the increase in the aspect ratio of the trench.
FIGS. 1a, 1b and 1c are flow diagrams illustrating the trench isolation structure and its fabricating method in accordance with an example of the prior art.
The conventional trench isolation structure in FIG. 1c comprises a substrate 11, a trench formed as deep as desired, and a trench plug 18' which is an insulating material of one or more kinds.
Referring to FIG. 1a, after the trench is formed in the substrate 11, there are sequentially formed a silicon oxide layer 171, a silicon nitride layer 172 and a BPSG (Boron Phospho Silicate Glass) layer 18. In this structure, the BPSG layer 18 may have a void 20 due to a high aspect ratio. Therefore, a heat treatment is carried out on the BPSG layer 18 so as to reflow it, as shown in FIG. 1b. Then, as shown in FIG. 1c, the trench plug 18' is formed by an etch-back on the BPSG layer 18. The reference numeral 12 of FIGS. 1a, 1b and 1c depicts a silicon oxide layer which is a part of a mask layer used in the process for forming the trench.
The above-described conventional trench isolation structure has some advantages in that a heat treatment is needed for reflowing the BPSG layer 18 because the void 20 is generated and, as illustrated in FIGS. 1b and 1c, the surface of the BPSG layer 18 is not uniform after it reflows.
FIGS. 2a through 2d are flow diagrams illustrating the trench isolation structure and its fabricating method in accordance with another example of the prior art.
As shown in FIG. 2d, the trench isolation structure disclosed in U.S. Pat. No. 5,099,304 comprises a substrate 21, a trench formed in the substrate 21, and a trench-filling material layer which includes a first trench-filling material layer 281' of polysilicon and a second trench-filling material layer 282' of BPSG.
Referring to FIG. 2a, after the trench is formed in the substrate 21, there are sequentially formed a silicon oxide layer 271 and a silicon nitride layer 272. Then, a polysilicon layer 281 is deposited on the above structure so as to fill the trench.
Referring to FIG. 2b, an etch-back is performed on the polysilicon layer 281 so that the first trench-filling material layer 281' is remained and fills a part of the trench. Then, as shown in FIG. 2c, a BPSG layer 282 is formed on the entire surface of the structure so as to fill the rest part of the trench which is filled with the first trench-filling material layer 281'.
In the next, as shown in FIG. 2d, a selective etching is carried out on the BPSG layer 282 so as to remove all portions except the trench and thereby form the second trench-filling material layer 282' that completely fills the rest part of the trench. After that, there is formed a silicon oxide layer 29 covering the silicon nitride layer 272 and the second trench-filling material layer 282'. The reference numeral 22 of FIGS. 2a through 2d depicts a silicon oxide layer which is a part of a mask layer used in forming the trench.
However, the device isolation structure disclosed in U.S. Pat. No. 5,099,304 involves a problem in that an additional process for forming another filling material layer must be carried out so as to fill the trench. Further, BPSG requiring a heat treatment for a reflow is used as a trench-filling material in the prior art. Therefore, for a second generation's highly integrated circuit that requires a low heat cycle, the BPSG used as a trench-filling material has a fatal disadvantage in that it is difficult to meet the conditions for an ion-implantation to form a junction.